Looking at the way things are now, I think anyone with reasonable intelligence could conclude that BFL is probably some kind of scam.
Of course the obvious exception are those with significant pre-orders, who are putting their fingers in their ears and saying "I'm not listening!" They can't afford for it to be a scam, so therefore it must not be one.
And of course anyone who points out the scam warning signs is abused.
It's Pirateat40 all over again, just a different type of scam. The CEO is a convicted fraudster for fucks sake, how dumb do you need to be?
Topic: [Archive] BFL trolling museum - page 32. (Read 69394 times)
I've read this is an FPGA in an ASIC box but correct me if I'm wrong.
I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.
I'm pretty sure BFL has NO ASIC chips whatsoever.
I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.
If not ASICs... then what 8 chips???
Oh sorry, i didn't see the "8 QFN packages". Thanks for the clarification.
I've read this is an FPGA in an ASIC box but correct me if I'm wrong.
I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.
I'm pretty sure BFL has NO ASIC chips whatsoever.
I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.
If not ASICs... then what 8 chips???
I've read this is an FPGA in an ASIC box but correct me if I'm wrong.
I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.
I'm pretty sure BFL has NO ASIC chips whatsoever.
I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.
If not ASICs... then what 8 chips???
I've read this is an FPGA in an ASIC box but correct me if I'm wrong.
I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.
I'm pretty sure BFL has NO ASIC chips whatsoever.
dummy
I've read this is an FPGA in an ASIC box but correct me if I'm wrong.
I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.
I'm pretty sure BFL has NO ASIC chips whatsoever.
I've read this is an FPGA in an ASIC box but correct me if I'm wrong.
I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.
I'm pretty sure BFL has NO ASIC chips whatsoever.
could be it is a ASIC board without chips on it.
BTW: what a disaster for BFL if Avalon get chips in some days and will be the first start to mine with ASIC. Avalon will mine also for themselves for shure!
I can see how BFL was put in a tough spot a couple months back... They find out that the QFN package won't be able to be cooled as effectively as they thought it would. So, what can they do?
They could have released a product that would borderline meet their specs, but people mining in warmer climates would likely have had legitimate complaints about the performance. They really didn't want to screw up their specs as they did on their FPGA's - their critics would cize and no one would really trust their specs in the future. Not to mention, they wanted longevity and superiority of their product with the ability to run significant overclocks down the line.
They could have informed their customers of the details early on, but they would also inform their competition at the same time. Did they really want Avalon and bASIC to know why they had to delay, so that they could make similar adjustments to their own products? Heck no - any competitive advantage they can get is a bonus. If their competitors put all their time and money into a product that doesn't work very well, it'll only mean more sales for BFL in the end.
So, they take the only option they have left - holding the information close until their competitors are most definitely committed on the paths they have chosen. Sure, they lost some preorders, but they had the potential to lose a lot more with either of the other options. They were most certainly stuck between a rock and a hard place. Again, this is only more evidence that they are indeed looking to the long-term future, by making sure they release the best product they can that will have the most room for increase of speed, best thermal flexibility, and best longevity. When everyone is done releasing their initial ASICs, BFL will most certainly be the premium product of the bunch.
Don't get me wrong - I hate the delays. If it were up to me, I would have rather had the marginally-adequate QFN package back in November than the flip chip package in February - it would have likely made me a good deal more BTC, even in the long term. But I can absolutely see where they were coming from and why they made the decision that they did. They don't want to be the company that releases marginally adequate products, and I can respect that decision.
They could have released a product that would borderline meet their specs, but people mining in warmer climates would likely have had legitimate complaints about the performance. They really didn't want to screw up their specs as they did on their FPGA's - their critics would cize and no one would really trust their specs in the future. Not to mention, they wanted longevity and superiority of their product with the ability to run significant overclocks down the line.
They could have informed their customers of the details early on, but they would also inform their competition at the same time. Did they really want Avalon and bASIC to know why they had to delay, so that they could make similar adjustments to their own products? Heck no - any competitive advantage they can get is a bonus. If their competitors put all their time and money into a product that doesn't work very well, it'll only mean more sales for BFL in the end.
So, they take the only option they have left - holding the information close until their competitors are most definitely committed on the paths they have chosen. Sure, they lost some preorders, but they had the potential to lose a lot more with either of the other options. They were most certainly stuck between a rock and a hard place. Again, this is only more evidence that they are indeed looking to the long-term future, by making sure they release the best product they can that will have the most room for increase of speed, best thermal flexibility, and best longevity. When everyone is done releasing their initial ASICs, BFL will most certainly be the premium product of the bunch.
Don't get me wrong - I hate the delays. If it were up to me, I would have rather had the marginally-adequate QFN package back in November than the flip chip package in February - it would have likely made me a good deal more BTC, even in the long term. But I can absolutely see where they were coming from and why they made the decision that they did. They don't want to be the company that releases marginally adequate products, and I can respect that decision.
I've read this is an FPGA in an ASIC box but correct me if I'm wrong.
I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.
I'm pretty sure BFL has NO ASIC chips whatsoever.
I've read this is an FPGA in an ASIC box but correct me if I'm wrong.
I'm pretty sure that's the ASIC board. Probably the one that was fully populated with 8 chips that they were showing pictures of.
Translation:
Very true. I suppose I was hoping for Josh to divulge more detail into their strategies, reasons for delays, how things are going with the chips, etc...but then I realized they're a private company and they don't have to give out anything other than updates on the product itself. Therefore, the aforeposted image is 100% accurate
For a product that has been in the "Final Development Stage" for 3, now 4 months...they sure can't be any more specific than updating everyone saying "nothing is really nailed down and we don't have any proof of a prototype because if we did we would have brought it to CES."
BFL is full of shit.
Why not announce the timeline of delays by the very excuse themselves? Oh wait maybe that would give too much information about the fact that they were lying for months on end about where they actually were in the development process......."Final Development Stage". Looks like they are relying on someone else's word on the timelines and not on anything they actually know.
Without a prototype what the hell do they expect to accomplish by mass producing chips that could be flawed all while giving an unrealistic timeline of shipping preorders?
LOL just LAWL!
BFL is full of shit.
Why not announce the timeline of delays by the very excuse themselves? Oh wait maybe that would give too much information about the fact that they were lying for months on end about where they actually were in the development process......."Final Development Stage". Looks like they are relying on someone else's word on the timelines and not on anything they actually know.
Without a prototype what the hell do they expect to accomplish by mass producing chips that could be flawed all while giving an unrealistic timeline of shipping preorders?
LOL just LAWL!
As per Josh on the BFL Forums:
My question now is:
Since competition doesn't matter anymore, why not fill us in on EVERYTHING going on? Exact specs / dimensions, chip testing results, etc...
Quote
Just so everyone understands why we have not, up until now, provided updates like this, I want to point out that if we had released this type of information in the beginning, it would have given our competitors a substantial boost in figuring out how to design a product that would compete with us. This is something we do not want to happen. We will not pay for others to learn from our experience in this particular venture. They need to pay the piper if they want to ship a competing product. Since Avalon is commited at this point and bASIC is dead, there is now no harm in releasing the information. I suspect Avalon will run into the same heat issues we ran into once they finally turn on a unit and make it go. In fact, it may be much worse since they are on 110nm and have 80+ chips (speculation) to cool. On the other hand, it may simply be because the heat density in our full custom 65nm chip just overwhelms a QFN package cooled by vias and doing the same thing on a place and route 110nm QFN would work ok. We have not tried it, so who's to say. But my point is, we can't release that sort of information while it still will benefit our competition. The same goes for specific timelines - it will give the competition something specific to shoot for. Again, Avalon is now committed and there is nothing they can do to change it with 5 days to go, so the release of that information is acceptable.
Going forward, I will be posting more detailed updates, since that sort of information will not benefit Avalon. They either ship on the 19th or they delay and nothing we reveal can change that.
Going forward, I will be posting more detailed updates, since that sort of information will not benefit Avalon. They either ship on the 19th or they delay and nothing we reveal can change that.
My question now is:
Since competition doesn't matter anymore, why not fill us in on EVERYTHING going on? Exact specs / dimensions, chip testing results, etc...
It is all fluff. Excuses to buy more preorders and time.
Keep hanging in there though.
As per Josh on the BFL Forums:
My question now is:
Since competition doesn't matter anymore, why not fill us in on EVERYTHING going on? Exact specs / dimensions, chip testing results, etc...
My question now is:
Since competition doesn't matter anymore, why not fill us in on EVERYTHING going on? Exact specs / dimensions, chip testing results, etc...
How could they? They don't have any data themselves yet, see for example this awesome fluff on wattage
Quote
Originally, we were at about .8w per GH (Yes, we built 20% into our announcements) and we are estimating that it's possible that a worst case scenario would lead to a bit under 1.2w per GH. If that ends up being the case, then yes we will have missed our power targets and yes we will gladly pay out the bounty. However, at less than 72 watts for 60 GH/s, it's still more than 5x better than any other product. However, we still believe that our .8w / GH target is what we will ship, but we like to prepare for the worst case scenario.
Translation:
As per Josh on the BFL Forums:
My question now is:
Since competition doesn't matter anymore, why not fill us in on EVERYTHING going on? Exact specs / dimensions, chip testing results, etc...
Quote
Just so everyone understands why we have not, up until now, provided updates like this, I want to point out that if we had released this type of information in the beginning, it would have given our competitors a substantial boost in figuring out how to design a product that would compete with us. This is something we do not want to happen. We will not pay for others to learn from our experience in this particular venture. They need to pay the piper if they want to ship a competing product. Since Avalon is commited at this point and bASIC is dead, there is now no harm in releasing the information. I suspect Avalon will run into the same heat issues we ran into once they finally turn on a unit and make it go. In fact, it may be much worse since they are on 110nm and have 80+ chips (speculation) to cool. On the other hand, it may simply be because the heat density in our full custom 65nm chip just overwhelms a QFN package cooled by vias and doing the same thing on a place and route 110nm QFN would work ok. We have not tried it, so who's to say. But my point is, we can't release that sort of information while it still will benefit our competition. The same goes for specific timelines - it will give the competition something specific to shoot for. Again, Avalon is now committed and there is nothing they can do to change it with 5 days to go, so the release of that information is acceptable.
Going forward, I will be posting more detailed updates, since that sort of information will not benefit Avalon. They either ship on the 19th or they delay and nothing we reveal can change that.
Going forward, I will be posting more detailed updates, since that sort of information will not benefit Avalon. They either ship on the 19th or they delay and nothing we reveal can change that.
My question now is:
Since competition doesn't matter anymore, why not fill us in on EVERYTHING going on? Exact specs / dimensions, chip testing results, etc...
Well it does feature the new heatsink, so who knows. It's not an ASIC in there, that much is sure.
My question is wither or not the single/jally boxes at CES are equally empty.
Nope.
Which makes the Big Box of EmptynessTM all the more absurd
Is it February or Febuary, because I prefer -uary, and what's with this Ru?
BFL-Josh, Inaba: Is there a time limit on using my fpga upgrade? I was planning on waiting to you guys shipped to put in an order, just wanted to make sure I will still be able to use the single fpga upgrade still. Thanks.
BFL-Josh, Inaba: Is there a time limit on using my fpga upgrade? I was planning on waiting to you guys shipped to put in an order, just wanted to make sure I will still be able to use the single fpga upgrade still. Thanks.
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